SIM-DSP: VLSI Signal Integrity Analysis and Macromodeling via Digital Signal Processing Techniques
Speaker:Dr. Chi-Un Lei
University of Hong Kong
Date & Time:17 May 2011 (Tuesday) 11:00 - 12:30
Organized by:Department of Electrical and Electronics Engineering


In view of the increasing operation frequency and decreasing feature size of the very-large-scale integration (VLSI) circuits, signal integrity (SI) effects have become a dominant factor which limits the performance of high-speed electronics systems. To ensure reliable signal transmissions in these systems, interconnect simulations are required to capture the SI behaviours during IC design phase. To handle large scale simulation computations effectively, macromodeling is applied to replace high-order system by a reduced model. Due to the strict requirements of modeling process, and an increasing need to model quickly emerging interconnect features, renewal of macromodeling scheme is a research topic of high value, yet also a challenging task.

To address these issues, we have developed a "VLSI Signal Integrity Analysis and Macromodeling via Digital Signal Processing Techniques" (SIM-DSP) framework, which applies DSP techniques to facilitate the macromodeling process. The developed techniques in the framework have been shown to significantly improve the accuracy and functionality of the modeling process.

In this presentation, we will first introduce general SI concepts and SI issues in circuit design. We will then discuss the main features of the proposed SIM-DSP framework. Practical examples will also be used to demonstrate the working process of the SI analysis and the SIM-DSP framework.


Chi-Un Lei received B.Eng. (first class honors) and Ph.D. in Electrical and Electronics Engineering from the University of Hong Kong in 2006 and 2011, respectively. He is now a Teaching Assistant for the Common Core Curriculum at the University of Hong Kong. His research interests include VLSI macromodeling, VLSI computer-aided signal integrity analysis and system identification techniques.

He is currently a general chair in a circuit design (DATICS) workshop series, a reviewer of a few IEEE journals, and an associate editor of the "International Journal of Design, Analysis and Tools for Integrated Circuits and Systems".

He was awarded with the Best Student Paper Award in IAENG IMECS 2007 and 2010. In 2010, he also received the Best Poster Award in IEEE ASP-DAC Student Forum 2010 and the IEEE ASP-DAC 2010 Student Travel Grant.