{"id":4213,"date":"2020-09-11T10:39:21","date_gmt":"2020-09-11T02:39:21","guid":{"rendered":"https:\/\/www.fst.um.edu.mo\/personal\/?page_id=4213"},"modified":"2026-03-02T15:09:50","modified_gmt":"2026-03-02T07:09:50","slug":"publication","status":"publish","type":"page","link":"https:\/\/www.fst.um.edu.mo\/personal\/junyin\/publication\/","title":{"rendered":"Publication"},"content":{"rendered":"\t\t
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Journal paper highlights:<\/strong><\/span><\/p>

JSSC<\/strong> (16 papers): [J04], [J05], [J06], [J09], [J12], [J13], [J15], [J17], [J19], [J23], [J29], [J42], [J44], [J45], [J51], [J53]<\/span><\/p>

TCAS-I<\/strong> (10 paper): [J25], [J30], [J36], [J37], [J38], [J40], [J41], [J46], [J50], [J54]<\/span><\/p>

TCAS-II<\/strong> (13 papers): [J08], [J12], [J14], [J20], [J21], [J22], [J26], [J32], [J33], [J34], [J43], [J47], [J48]<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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[J54] Xiangxun Zhan, Pui-In Mak, Rui P Martins, Jun Yin, “A Low Phase Noise Circular-Coupled Quad-Core Oscillator Employing Dual-Path Synchronization Technique,” IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/strong><\/em>, vol. xx, no. xx, pp. xxxx-xxxx, xxx. 2026.<\/span><\/span> [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J53] Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Pui-In Mak, Rui P. Martins, Jun Yin, <\/span>“A Low-Jitter mm-Wave Fractional-N Sub-Sampling PLL Using a Polarity-Reversible SSPD for DTC Range Reduction,” IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. xx, no. xx, pp. xxx<\/span>-xxx<\/span>, xxx. xxxx. [Download][<\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/span><\/p>

[J52] Xi Meng, Haoran Li, Peng Chen, Jun Yin, Rui P. Martins, Pui-In Mak<\/span>, “An 18.4 GHz Low-Jitter and Fast-Locking Fractional-N Digital PLL Using Function-Reused TDC and Path-Selection BBPDs,” IEEE Transactions on Microwave Theory and Techniques<\/em><\/strong><\/span> (T-MTT)<\/span><\/em>,\u00a0<\/span>vol. 73, no. 11, pp. 8929-8941, Nov. 2025.<\/span>\u00a0[Download][<\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J51] Yue Wu, Yatao Peng, Andrea Ruffino, Jad Benserhir, Jun Yin, Rui P. Martins, Pui-In Mak, Edoardo Charbon,\u00a0<\/span>“A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment,” IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 60, no. 10, pp. 3859<\/span>-3875<\/span>, Oct. 2025. [Download][<\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/span><\/p>

[J50] Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Rui P Martins, Pui-In Mak, Quan Pan, “Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62-\u03bcs Locking Time,” IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/strong><\/em>, vol. 72, no. 9, pp. 4584-4596, Sep. 2025.<\/span><\/span> [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J49] Jian Yang, Yi Peng, Jun Yin, Pui-In Mak, Quan Pan, “A 50-Gb\/s 1.35-pJ\/b PAM-4 VCSEL Transmitter With Three-Tap Asymmetric FFE and Current-Reuse Technique in 40-nm CMOS,” IEEE Transactions on Microwave Theory and Techniques<\/em><\/strong><\/span> (T-MTT)<\/span><\/em>,\u00a0<\/span>vol. 73, no. 7, pp. 3855-3864, Jul. 2025.<\/span>\u00a0[Download][<\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J48] Tailong Xu, Haoran Li, Xi Meng, Xiangxun Zhan, Yatao Peng, Jun Yin, Shiheng Yang, Chao Fan, Zhixiang Huang, Rui P Martins, Pui-In Mak, “Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor Reduction,” IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 72, no. 3, pp. 439-443, Mar. 2025. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J47] Xiangxun Zhan, Jun Yin, Rui P Martins, Pui-In Mak, “A Series-LC-Assisted Oscillator Achieving-140.2 dBc\/Hz Phase Noise and 187.5 dBc\/Hz FoM at 10MHz Offset From 10.7 GHz,” IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 72, no. 2, pp. 389-393, Feb. 2025. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J46] Zhizhan Yang, Haochen Zhang, Jun Yin, Rui P. Martins, Pui-In Mak, “An 840-to-970 MHz Multimodal Wake-up Receiver with a Q-equalized Antenna-ED Interface and 2-dimensional Wake-up Identification,” IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/strong><\/em>, vol. 72, no. 3, pp. 1165-1177, Mar. 2025.<\/span><\/span> [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J45] Haocheng Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui. P. Martins, Pui-In Mak, \u00a0” A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory-Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell,” IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 60, no. 1, pp. 321<\/span>-331<\/span>, Jan. 2025. [Download][<\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/span><\/p>

[J44] Haoran Li, Tailong Xu, Xi Meng, <\/span>Jun Yin, Rui P. Martins and Pui-In Mak, \u201cA 23.2-to-26GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment<\/span>,<\/span>\u201d <\/span>IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 59, no. 12, pp. 3<\/span>952-3965<\/span>, Dec. 2024. [Download][<\/span><\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J43] Zhizhan Yang, Jun Yin, Rui P. Martins, Pui-In Mak, \u201cComplementary Drain-Grounded VCO-PA Improving <\/span>Transmit Efficiency Over a Wide EIRP Range,<\/span>\u201d IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 71, no. 10, pp. 4422-4426, Oct. 2024. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J42] <\/span>Zhizhan Yang,<\/span> Jun Yin<\/span>, Wei-Han Yu, Haochen Zhang, Rui P. Martins, Pui-In Mak, \u201c<\/span>A ULP Long-Range Active-<\/span>RF Tag With Automatically Calibrated Antenna\u2013TRX Interface,<\/span>\u201d <\/span>IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 59, no. 11, pp. 3670-3682, Nov. 2024. [Download][<\/span>IEEE Xplore link<\/a><\/span>]<\/span><\/span><\/p>

[J41] Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, and Rui P. Martins, “Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion,” IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/strong><\/em>, vol. 70, no. 12, pp. 5110-5123, Dec. 2023. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J40] Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 6-to-7.5-GHz 54-fs rms Jitter Type-II Reference-Sampling PLL Featuring a Gain-Boosting Phase Detector for In-Band Phase-Noise Reduction,” IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/strong><\/em>, vol. 69, no. 12, pp. 4774-4786, Dec. 2022.\u00a0[Download]<\/span>[IEEE Xplore link<\/a><\/span>]<\/p>

[J39] Xiaoqi Lin, Jun Yin, Pui-In Mak, and Rui P. Martins, “A Swing-Enhanced Class-D VCO Using a Periodically Time-Varying (PTV) Inductor,” IEEE Solid-State Circuits Letters (SSC-L)<\/em><\/strong>, vol. 5, pp. 25-28, Feb. 2022. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[J38] Yueduo Liu, Rongxin Bao, Zihao Zhu, Shiheng Yang, Xiong Zhou, Jun Yin, Pui-In Mak, and Qiang Li, “Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop,” IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/em><\/strong>, vol. 69, no. 2, pp. 495-505, Feb. 2022. [Download][IEEE Xplore link<\/span><\/a>]
<\/span><\/p>

[J37] Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui P. Martins, and R. B. Staszewski, \u201cMismatch Analysis of DTCs with an Improved BIST-TDC in 28nm CMOS,\u201d IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/em><\/strong>, vol. 69, no. 1, pp. 196-206, Jan. 2022. [Download<\/span>][<\/a>IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[J36] Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui P. Martins, and R. B. Staszewski, \u201cA 529-\u03bcW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS,\u201d IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/em><\/strong>, vol. 69, no. 1, pp. 51-63, Jan. 2022. [Download<\/a><\/span>][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J35] Rui P. Martins, Pui-In Mak, Sai-Weng Sin, Man-Kay Law, Yan Zhu, Yan Lu, Jun Yin, Chi-Hang Chan, Yong Chen, Ka-Fai Un, Mo Huang, Minglei Zhang, Yang Jiang and Wei-Han Yu, “Revisiting the Frontiers of Analog and Mixed-Signal Integrated Circuits Architectures and Techniques towards the future Internet of Everything (IoE) Applications”, Foundations and Trends\u00ae in Integrated Circuits and Systems<\/em><\/strong>: Vol. 1: No. 2-3, pp 72-216, Nov. 2021. [Download][<\/span>Link<\/span><\/a>]<\/span><\/p>

[J34] Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, and Rui P. Martins, \u201cA 600-\u00b5m2<\/sup> Ring-VCO-Based Hybrid PLL Using a 30-\u03bcW Charge-Sharing Integrator in 28-nm CMOS,\u201d IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 68, no. 9, pp. 3108-3112, Sep. 2021. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J33] Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Pui-In Mak, and Rui P. Martins, \u201cA Wide-PCE-Dynamic-Range CMOS Cross-Coupled Differential-Drive Rectifier for Ambient RF Energy Harvesting,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 68, no. 6, pp. 1743-1747, Jun. 2021. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J32] Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, and Rui P. Martins, \u201cAn 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier For Multiband Uplink Radio Transceivers,\u201d IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 68, no. 4, pp. 1178-11182, Apr. 2021. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J31] Rui P. Martins, Pui-In Mak, Chi-Hang Chan, Jun Yin, Yan Zhu, Yong Chen, Yan Lu, Man-Kay Law, Sai-Weng Sin,\u00a0“Bird’s-eye view of analog and mixed-signal chips for the 21st century,” International Journal of Circuit Theory and Applications<\/em><\/strong>, Vol. 49, No. 3, pp 746-761, Feb. 2021. [Download<\/a><\/span>][Wiley Link<\/a><\/span>]<\/span><\/p>

[J30] Ricardo Martins, Nuno Louren\u00e7o, Nuno Horta, Shenke Zhong,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cDesign of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B\/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/em><\/strong>, vol. 67, no. 11, pp. 3965-3977, Nov. 2020.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J29]\u00a0Kai Xu,\u00a0Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, and Rui P. Martins, \u201cA Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push-Pull LNA,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 55, no. 8, pp. 2055-2068, Aug. 2020. [Download<\/a><\/span>][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J28]\u00a0Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak,\u00a0Jun Yin, and Rui P. Martins, \u201cA 1-V 4-mW Differential-Folded Mixer With Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF,\u201d \u00a0IEEE Transactions on Very Large Scale Integration (VLSI) Systems<\/em><\/strong>, vol. 28, no. 5, pp. 1164-1174, May 2020.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J27]\u00a0Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak,\u00a0Jun Yin, and Rui P. Martins, \u201cA 3.15-mW +16.0-dBm IIP3 22-dB CG Inductively Source Degenerated Balun-LNA Mixer With Integrated Transformer-Based Gate Inductor and IM2 Injection Technique,\u201d \u00a0IEEE Transactions on Very Large Scale Integration (VLSI) Systems<\/em><\/strong>, vol. 28, no. 3, pp. 700-713, Mar. 2020.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J26] Gabriel Chong, Harikrishnan Ramiah,\u00a0Jun Yin, Jagadheswaran Rajendran, Wong Wei Ru, Pui-In Mak, and Rui P. Martins, \u201cCMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting-Model and Analysis,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>, vol. 66, no. 12, pp. 1942-1946, Dec. 2019.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J25]\u00a0Ka-Fai Un, Gengzhen Qi,\u00a0Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, and Rui P. Martins, \u201cA 0.12-mm\u00b2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-\u03bcs Settling Time for Multi-ISM-Band ULP Radios,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems I: Regular Papers (TCAS-I)<\/em><\/strong>, vol. 66, no. 9, pp. 3307-3316, Sep. 2019.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J24]\u00a0Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Viteea, Pravinah Nair Shasidharan,\u00a0Jun Yin, Pui-In Mak, Rui P.Martins, \u201cA coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy\/ZigBee receiver consuming 2\u202fmA,\u201d\u00a0\u00a0Elsevier the VLSI Journal \u2013 Integration<\/strong><\/em>,\u00a0vol. 66, issue 3, pp. 112-118, May. 2019. [Download][Elsevier\u00a0link<\/a><\/span>]<\/span><\/p>

[J23]\u00a0Shiheng Yang,\u00a0Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, and Rui P. Martins, \u201cA 0.2-V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 54, no. 5, pp. 1351-1362, May. 2019. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J22]\u00a0Iat-Fai Sun,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cA Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>,\u00a0vol. 66 no. 4, pp. 527 -531, Apr. 2019. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J21] Chee-Cheow Lim, Harikrishnan Ramiah,\u00a0Jun Yin, Pui-In Mak,\u00a0and Rui P. Martins, \u201cA 5.1-to-7.3 mW, 2.4-to-5 GHz Class-C Mode-Switching Single-Ended-Complementary VCO Achieving >190 dBc\/Hz FoM,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>,\u00a0vol. 66 no. 2, pp. 237 -241,\u00a0Feb. 2019. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J20] Tongquan Jiang,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cA 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc\/Hz FoM,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>,\u00a0vol. 66 no. 2, pp. 157 -161, Feb. 2019. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J19]\u00a0\u00a0Shiheng Yang,\u00a0Jun Yin,Pui-In Mak, and Rui P. Martins, \u201cA 0.0056-mm\u00b2 -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 54, no. 1, pp. 88-98, Jan. 2019. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J18] Ricardo Martins, Nuno Louren\u00e7o, Nuno Horta,\u00a0Jun Yin, Pui-In Mak and Rui P. Martins, \u201cMany-Objective Sizing Optimization of a Class-C\/D VCO for Ultralow-Power IoT and Ultralow- Phase-Noise Cellular Applications,\u201d\u00a0IEEE Transactions on Very Large Scale Integration (VLSI) Systems<\/strong><\/em>,\u00a0vol. 27, no. 1, pp. 69-82, Jan. 2019. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J17]\u00a0Chee-Cheow Lim, Harikrishnan Ramiah,\u00a0Jun Yin, Pui\u2013In Mak, and Rui P. Martins, \u201cAn Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 53 no. 12, pp. 3528 -3593, Dec. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J16] Gabriel Chong, Harikrishnan Ramiah,\u00a0Jun Yin, Jagadheswaran Rajendran, Wong Wei Ru, Pui-In Mak,\u00a0and Rui P. Martins, \u201cAmbient RF energy harvesting system: a review on integrated circuit design,\u201d\u00a0Springer\u00a0<\/em>Analog Integrated Circuits and Signal Processing<\/em><\/strong>, vol. 97, issue 3, pp. 515-531, Dec. 2018. [Download][Springer link<\/a><\/span>]<\/span><\/p>

[J15]\u00a0Yatao Peng,\u00a0Jun Yin,\u00a0Pui-In Mak, and Rui P. Martins, \u201cLow-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 53, no. 11, pp. 3232-3242, Nov. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J14] Xinqiang Peng,\u00a0Jun Yin, Wei-Han Yu, Pui-In Mak, and Rui P. Martins, \u201cA Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter with 34.7% Peak System Efficiency,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>,\u00a0vol. 65 no. 9, pp. 1174-1178, Sept. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J13] Haidong Yi, Wei-Han Yu, Pui-In Mak,\u00a0Jun Yin,\u00a0and Rui P. Martins, \u201cA 0.18V 382\u03bcW Bluetooth Low-Energy (BLE) Receiver Front-End with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 53, no. 6, pp. 1618-1627, Jun. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J12] Haidong Yi,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cA 0.032-mm2<\/sup>\u00a00.15-V 3-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>,\u00a0vol. 63, no. 2, pp. 146-150 , Feb. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J11] Xingqiang Peng,\u00a0Jun Yin, Pui-In Mak, Wei-Han Yu, and R. P. Martins, \u201cA 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) Pout,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 52, no. 6, pp. 1495-1508, Jun. 2017. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J10] Chee-Cheow Lim, Harikrishnan Ramiah,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cLC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study,\u201d\u00a0Springer\u00a0<\/em>Analog Integrated Circuits and Signal Processing<\/em><\/strong>, vol. 91, issue 3, pp. 497-502, Jun. 2017. [Download][Springer link<\/span><\/a>]<\/span><\/p>

[J09] Jun Yin, Pui-In Mak, Franco Maloberti, and Rui P. Martins, \u201cA Time-Interleaved Ring-VCO with Reduced 1\/f\u00b3 Phase Noise Corner, Extended Tuning Range and Inherent Divided Output,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 51, no. 12, pp. 2979-2991, Dec. 2016. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J08] Sujiang Rong,\u00a0Jun Yin,\u00a0and\u00a0Howard C. Luong, \u201cA 0.05-to-10GHz, 19-to-22GHz, and 38-to-44GHz Frequency Synthesizer for Software-Defined Radios in 0.13-\u00b5m CMOS Process,\u201d\u00a0IEEE\u00a0Transactions on Circuits and Systems II: Express Briefs (TCAS-II)<\/em><\/strong>,\u00a0vol. 63, no. 1, pp. 109-113, Jan.\u00a02016.\u00a0 [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J07] Md. Tawfiq Amin,\u00a0Jun Yin, Pui-In Mak, and R. P. Martins, \u201cA 0.07 mm2<\/sup>\u00a02.2 mW 10 GHz Current-Reuse Class-B\/C Hybrid VCO Achieving 196-dBc\/Hz FoMA<\/sub>,\u201d\u00a0IEEE Microwave and Wireless Components\u00a0Letters \u00a0(MWCL)<\/em><\/strong>, vol. 25, no. 7, pp. 457-459, Jul. 2015. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J06] Alvin Li, Shiyuan Zheng,\u00a0Jun Yin, Xun Luo,\u00a0and Howard C. Luong, \u201cA 21\u201348 GHz Subharmonic Injection-Locked Fractional-N Frequency Synthesizer for Multiband Point-to-Point Backhaul Communications,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/em><\/strong>, vol. 49, no. 8, pp. 1785-1799, Aug. 2014. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J05] Jun Yin,\u00a0<\/strong>and\u00a0Howard C. Luong, \u201cA 57.5\u201390.1-GHz Magnetically Tuned Multimode CMOS VCO,\u201d\u00a0IEEE Journal of Solid-State Circuits (JSSC)<\/strong><\/em>, vol. 48, no. 8, pp. 1851-1861, Aug. 2013. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J04] Jun Yin, Jun Yi, Man Kay Law, Yunxiao Ling, Man Chiu Lee, Kwok Ping Ng, Bo Gao, Howard C. Luong, Amine Bermak, Mansun Chan, Wing-Hung Ki, Chi-Ying Tsui and Matthew Yuen, \u201cA System-on-Chip EPC Gen-2 Passive UHF RFID Tag with Embedded Temperature Sensor,\u201d IEEE Journal of Solid-State Circuits (JSSC)<\/strong><\/em>, vol. 45, no. 11, pp. 2404-2420, Nov. 2010. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J03] Fei Song,\u00a0Jun Yin, Huailin Liao, and Ru Huang, \u201cUltra-Low-Power Clock Generation Circuit for EPC Standard UHF RFID Transponders,\u201d\u00a0IET Electronics Letters (EL)<\/em><\/strong>, vol. 44, no. 3, pp. 199-201, Jan. 2008. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J02] Cheng Li,\u00a0Huailin Liao, Chuan Wang,\u00a0Jun Yin, Ru Huang, Yangyuan Wang, \u201cHigh-Q Integrated Inductor Using Post-CMOS Selectively Grown Porous Silicon (SGPS) Technique for RFIC Applications,\u201d\u00a0IEEE Electron Device Letters<\/strong><\/em>,\u00a0vol. 28, no. 8, pp. 763-766, Aug. 2007. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[J01]\u00a0Jun Yin, Xiaokang Shi, Ru Huang, \u201cA new method to simulate random dopant induced threshold voltage fluctuations in sub-50 nm MOSFET\u2019s with non-uniform channel doping,\u201d\u00a0Elsevier Solid-State Electronics<\/strong><\/em>,\u00a0vol. 50, no. 9-10, pp. 1551-1556, Sep. 2006. [Download][Elsevier\u00a0link<\/a><\/span>]7238972<\/span>4584<\/span>\u00a04596<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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ISSCC <\/span>(19 papers): [C02], [C08], [C09], [C10], [C11], [C12], [C18], [C19], [C22], [C23], [C24], [C25], [C30], [C31], [C32], [C33], [C34], [C35], [C36]<\/span><\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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[C36] Xincheng Du, Xiangxun Zhan, Tincheng Ou, Zaize Chen, Jinge Li, Haoran Li, Zhizhan Yang, Zhuo Xu, Pui-In Mak, Rui P. Martins, Jun Yin, “A 0.068mm2<\/sup> 8.5-to-12.7GHz Complementary Dual-Core VCO with Auto-2nd<\/sup>-Harmonic-Tracking Technique Achieving 202.7dBc\/Hz Peak FoMT<\/sub> and 0.9dB-FoM Variation at a 1MHz Offset in a 39.6% Tuning Range,”\u00a0IEEE International Solid-State Circuit Conference (ISSCC<\/strong>)<\/em>, pp. 472-473, San Francisco, Feb. 2026. [Download][IEEE Xplore link]<\/span><\/p>

[C35] Yue Wu, Yatao Peng, Jiawei Li, Fengen Yuan, Jinge Li, Jun Yin, Rui P. Martins, Pui-In Mak, “A 17.9-to-22.4GHz 195.6\u00b11.3dBc\/Hz FoM Quad-Core Class-F-1<\/sup> VCO Featuring Improved Synchronization Using a Circular Pentafilar Transformer-Based Tank,” IEEE International Solid-State Circuit Conference (ISSCC<\/strong>)<\/em>, pp. 474-475, San Francisco, Feb. 2026. [Download][IEEE Xplore link]<\/span><\/p>

[C34] Jiawen Chen, Kai. Xu, Luyi Guo, Teerachot Siriburanon, Jun Yin, Bashir M. Al-Hashimi, Robert Bogdan Staszewski, “A Dual-Mode DCO-PA with a Twisted 8-Shape Inductor for BLE Achieving 42% TX Efficiency at 1.6dBm and 0.29mW RX Clock,” IEEE International Solid-State Circuit Conference (ISSCC<\/strong>)<\/em>, pp. 482-483, San Francisco, Feb. 2026. [Download][IEEE Xplore link]<\/span><\/p>

[C33] Zhewen Yu, Zhiguo Tong, Junwei Huang, Jun Yin, Yan Lu, “A Compact Dual-Capacitor Relay SPT Supply Modulator with Overshoot-Free Adaptive On-Time Control for 5G FR2 CMOS PA,”\u00a0IEEE International Solid-State Circuit Conference (ISSCC<\/strong>)<\/em>, pp. 462-463, San Francisco, Feb. 2026. [Download][IEEE Xplore link]<\/span><\/p>

[C32] Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui P. Martins, Pui-In Mak, “A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the Edge<\/span>,”\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/span>, pp. 362-363, San Francisco, Feb. 2025. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C31] Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin, Rui P. Martins, Pui-In Mak, “A 27GHz Fractional-N Sub-Sampling PLL Achieving 57.9fsrms Jitter, -249.7dB FoM, and 1.98\u03bcs Locking Time Using a Polarity-Reversible SSPD<\/span>,” IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 336-337, San Francisco, Feb. 2025. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C30] Yueduo Liu, Zihao Zhu, Xinyu Yang, Rongxin Bao, Zehao Zhang, Hongshuai Zhang, Jiaxin Liu, Zheng Wang, Mingkang Zhang, Na Yan, Jun Yin, Pui-In Mak, Shiheng Yang, “A 0.4\u03bcW\/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm\/\u00b0C from -40 to 125\u00b0C,” IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 84-85, San Francisco, Feb. 2025. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C29] Xiangxun Zhan, Jun Yin, Rui P. Martins, Pui-In Mak, \u201cA 54.6-65.1 GHz Multi-Path-Synchronized 16-Core Oscillator Achieving -131.4 dBc\/Hz PN and 195.8 dBc\/Hz FoMT at 10 MHz Offset in 65nm CMOS,\u201d IEEE European Solid-State Circuits Conference (ESSCIRC)<\/em><\/strong>, pp. 321-324, Bruges, Sep. 2024. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C28] Yue Wu, Yatao Peng, Benhao Huo, Jun Yin, Pui-In Mak, Rui P. Martins, \u201cA Switchless Dual-core Triple-Mode VCO Achieving 7.1-to-15.7 GHz Frequency Tuning Range and a 202.1 dBc\/Hz Peak FoM at 3.7 Kelvin,\u201d IEEE Radio-Frequency Integrated Circuits Symposium (RFIC)<\/em><\/strong>, pp. 243-246, Washington, DC, Jun. 2024. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C27] Qiyao Jiang, Jun Yin, Quan Pan, Rui P. Martins, Pui-In Mak, \u201c52.3-to-67.3GHz 35.8-kHz-Resolution Triple-Push DCO Exploiting Source-Combining Technique for Third-Harmonic Enhancement Achieving 196.4dBc\/Hz Peak FoMT<\/sub> at 10MHz Offset,\u201d IEEE Radio-Frequency Integrated Circuits Symposium (RFIC)<\/em><\/strong>, pp. 91-94, Washington, DC, Jun. 2024. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C26] Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui P. Martins, Quan Pan, \u201cA 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62\u03bcs Locking Time in 28nm CMOS,\u201d IEEE Custom Integrated Circuits Conference (CICC)<\/em><\/strong>, pp. 1-2, Denver, Apr. 2024. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C25] Ya Zhao, Chao Fan, Qiuyu Fang, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng, \u00a0“A 0.07mm2 <\/sup>20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc\/Hz FoM@10MHz<\/sub> and 200.7dBc\/Hz FoMA<\/sub> in 65nm CMOS,” IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 354-355, San Francisco, Feb. 2024. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C24] Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui P. Martins and Pui-In Mak, “A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms<\/sub> Jitter, -253.5dB FoMJ<\/sub>, and 0.55\u03bcs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment,” IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 204-205, San Francisco, Feb. 2024. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C23] Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, and Rui P. Martins, “A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power,” IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 470-471, San Francisco, Feb. 2023. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C22] Xiangxun Zhan, Jun Yin, Pui-In Mak, and Rui P. Martins, “A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving \u2212138dBc\/Hz PN and 193.3dBc\/Hz FoM at 10MHz Offset from 25.8GHz,” IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 148-149, San Francisco, Feb. 2023. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C21] Xi Meng, Junqi Guo, Haoran Li, Jun Yin,\u00a0Pui-In Mak, and Rui P. Martins, “A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2nd<\/sup>-Harmonic Resonance Achieving 187-to-188.1dBc\/Hz FoM in 28nm CMOS,” I<\/b><\/em>EEE Asian Solid-State Circuits Conference (A-SSCC)<\/em><\/strong>, pp. 1-2, Busan, Nov. 2021. [Download][IEEE Xplore link<\/span><\/a>]<\/span><\/p>

[C20] Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cA Periodically Time-Varying Inductor Applied to the Class-D VCO for Phase Noise Improvement,\u201d IEEE European Solid-State Circuits Conference (ESSCIRC)<\/em><\/strong>, pp. 307-301, Grenoble, Sep. 2021. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C19]\u00a0Chao Fan,\u00a0Jun Yin, Chee-Cheow Lim, Pui-In Mak, and Rui P. Martins, \u201cA 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc\/Hz FoM by Unifying a 20GHz 3rd<\/sup>-Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 282-283, San Francisco, Feb. 2020. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C18]\u00a0Gengzhen Qi, Haijun Shao, Pui-In Mak,\u00a0Jun Yin, and Rui P. Martins, \u201cA 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <\u2212157.5dBc\/Hz OB Noise,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 172-173, San Francisco, Feb. 2020. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C17]\u00a0Xiaolong Liu, Zhiqiang Huang,\u00a0Jun Yin, and Howard C. Luong, \u201cMagnetic-Tuning Millimeter-Wave CMOS Oscillators (Invited Paper),\u201d\u00a0IEEE Custom Integrated Circuits Conference (CICC)<\/em><\/strong>, pp. 1-8,\u00a0Austin, Aug. 2019.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C16] Ricardo Martins, Nuno Louren\u00e7o, Nuno Horta,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cUsing EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm,\u201d\u00a0International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)<\/strong><\/em>, pp. 15-18, Lausanne, July 2019.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C15]\u00a0Jun Yin, Xi Meng,\u00a0Pui-In Mak, and Rui P. Martins, \u201cWideband MM-Wave CMOS VCOs \u2013 Switched Inductor, Mode-Switching Inductive Tuning, and Harmonic Extraction Techniques (Invited Paper),\u201d\u00a0International Conference on Microwave and Millimeter Wave Technology (ICMMT)<\/strong><\/em>, pp. 1-3, Guangzhou, May, 2019.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C14]\u00a0Kai Xu,\u00a0Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, and R. P. Martins, \u201cA 2.4-GHz Single-Pin Antenna Interface RF Front-End with a Function-Reuse Single-MOS VCO-PA and a Push-Pull LNA,\u201d\u00a0IEEE Asian Solid-State Circuits Conference (A-SSCC)<\/strong><\/em>,\u00a0pp. 293-294, Tainan, Nov. 2018.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C13] Ricardo Martins, Nuno Louren\u00e7o, Nuno Horta,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cDesign and Optimization of a Class-C\/D VCO for Ultra-Low-Power IoT and Cellular Applications,\u201d\u00a0International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)<\/strong><\/em>, pp. 129-132, Prague, July 2018.\u00a0[Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C12] Chee-Cheow Lim,\u00a0Jun Yin, Pui-In Mak, Harikrishnan Ramiah, and Rui P. Martins, \u201cAn Inverse-Class-F CMOS VCO with Intrinsic-High-Q 1st<\/sup>\u2013 and 2nd<\/sup>-Harmonic Resonances for 1\/f2<\/sup>-to-1\/f3<\/sup>\u00a0Phase Noise Suppression Achieving 196.2dBc\/Hz FoM,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 374-375, San Francisco, Feb. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C11] Shiheng Yang,\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cA 0.0056mm2<\/sup>\u00a0All-Digital MDLL Using Edge Re-extraction, Dual Ring-VCOs and a 0.3mW Block-Sharing Frequency-Tracking Loop Achieving 292fsrms<\/sub>\u00a0Jitter and -249dB FoM,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 118-119, San Francisco, Feb. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C10] Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, and Rui P. Martins, \u201cA 0.2V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0dBm Output and 5.2nW Sleep Power in 28nm CMOS,\u201d IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 450-451, San Francisco, Feb. 2018. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C09] Wei-Han Yu, Haidong Yi,\u00a0Pui-In Mak,\u00a0Jun Yin,<\/strong>\u00a0and Rui P. Martins, \u201cA 0.18V 382\u03bcW Bluetooth Low-Energy (BLE) Receiver with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/strong><\/em>, pp. 414-415, San Francisco, Feb. 2017. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C08] Jun Yin, Pui-In Mak, Franco Maloberti, and Rui P. Martins, \u201cA 0.003mm2<\/sup>\u00a01.7-to-3.5GHz Dual-Mode Time-Interleaved Ring-VCO Achieving 90-to-150kHz 1\/f3<\/sup>\u00a0Phase-Noise Corner,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/em><\/strong>, pp. 48-49, San Francisco, Feb. 2016. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C07]\u00a0Chee-Cheow Lim, Harikrishnan Ramiah,\u00a0\u00a0Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cA High-Q Spiral Inductor with Dual-Layer Patterned Floating Shield in a Class-B VCO Achieving a 190.5-dBc\/Hz FoM,\u201d\u00a0IEEE International Symposium on Circuits and Systems (ISCAS)<\/em><\/strong>,\u00a0<\/em>pp. 1-4, Montreal, May 2014. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C06] Jun Yin and Howard C. Luong, \u201cA 0.37-to-46.5GHz Frequency Synthesizer for software-Defined Radios in 65nm CMOS,\u201d\u00a0IEEE Symposium on VLSI Circuits (VLSIC)<\/em><\/strong>, Honolulu, pp. 96-97, June 2014. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C05] Alvin Li, Shiyuan Zheng,\u00a0Jun Yin, Xun Luo,\u00a0and Howard C. Luong, \u201cA CMOS 21-48GHz Fractional-N Synthesizer Employing Ultra-Wideband Injection-Locked Frequency Multipliers,\u201d\u00a0IEEE Custom Integrated Circuits Conference (CICC)<\/em><\/strong>, San Jose, pp. 1-4, Sep. 2013. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C04] Jun Yin and Howard C. Luong, \u201cA 57.5-to-90.1GHz Magnetically-Tuned Multi-Mode CMOS VCO,\u201d IEEE Custom Integrated Circuits Conference (CICC)<\/em><\/strong>, San Jose, pp. 1-4, Sep. 2012. [Student Scholarship Award] [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C03] Jun Yin and Howard C. Luong,\u00a0<\/strong>\u201cA 0.8V 1.9mW 53.7-to-72.0GHz Self-Frequency-Tracking Injection-Locked Frequency Divider,\u201d\u00a0IEEE Radio-Frequency Integrated Circuits Symposium (RFIC)<\/em><\/strong>,\u00a0pp. 305-308, Montreal, Jun. 2012. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C02] Jun Yin, Jun Yi, Man Kay Law, Yunxiao Ling, Man Chiu Lee, Kwok Ping Ng, Bo Gao, Howard C. Luong, Amine Bermak, Mansun Chan, Wing-Hung Ki, Chi-Ying Tsui, and Matthew Yuen,<\/strong>\u00a0\u201cA System-on-Chip EPC Gen-2 Passive UHF RFID Tag with Embedded Temperature Sensor,\u201d\u00a0IEEE International Solid-State Circuit Conference (ISSCC)<\/strong><\/em>, pp. 308-309, San Francisco, Feb. 2010. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>

[C01] Cheng Li,\u00a0Huailin Liao, Chuan Wang,\u00a0Jun Yin, and\u00a0Ru Huang, \u201cHigh-Q Integrated Inductor Using Post-CMOS Selective Grown Porous Silicon (SGPS) Technique for RFIC Applications,\u201d\u00a0IEEE Radio-Frequency Integrated Circuits Symposium (RFIC)<\/em><\/strong>,\u00a0pp. 167-170, Honolulu, Jun. 2007. [Download][IEEE Xplore link<\/a><\/span>]<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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[B03] Shiheng Yang, Jun Yin, Pui-In Mak, and Rui P. Martins, \u201cMultiplying DLLs,\u201d\u00a0in\u00a0Phase-Locked Frequency Generation and Clocking: Architectures and circuits for modern wireless and wireline systems<\/strong><\/em>, pp.\u00a0645\u2013664,\u00a0The Institution of Engineering and Technology, 2020. [IET link<\/a><\/span>]<\/span><\/p>

[B02]\u00a0Jun Yin,\u00a0 \u201cUltra-Low Power Zigbee\/BLE Transmitter for IoT Applications,\u201d\u00a0in\u00a0Selected Topics in Power, RF, and Mixed-Signal ICs<\/em><\/strong>, pp. 315-337, River Publishers, 2018. [River link<\/a><\/span>]<\/span><\/p>

[B01] Howard C. Luong and\u00a0Jun Yin, \u201cTransformer-Based Design Techniques for Oscillators and Frequency Dividers,\u201d\u00a0Springer<\/em><\/strong>, Nov. 2015.\u00a0[Springer link<\/a><\/span>]<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t

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Home\u00a0 \u00a0 \u00a0 \u00a0 \u00a0Selected Publication Journal Journal paper highlights: JSSC (16 papers): [J04], [J05], [J06], [J09], [J12], [J13], [J15], [J17], [J19], [J23], [J29], [J42], [J44], [J45], [J51], [J53] TCAS-I (10 paper): [J25], [J30], [J36], [J37], [J38], [J40], [J41], [J46], [J50], [J54] TCAS-II (13 papers): [J08], [J12], [J14], [J20], [J21], [J22], [J26], [J32], [J33], [J34], … <\/p>\n

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